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Extended nodal analysis

Show simple item record Hajj I.N.
dc.contributor.editor 2012 2017-09-07T07:07:55Z 2017-09-07T07:07:55Z 2012
dc.identifier 10.1109/TCAD.2011.2167330
dc.identifier.issn 02780070
dc.description.abstract This paper presents an extension to the popular nodal and modified nodal formulation methods that allows elements whose characteristic functions include controlling variables, in addition to voltages and currents, other variables, such as charge, flux, and other physical parameters, to be included in the circuit equation formulation in a straightforward manner. Stamps, similar to nodal and modified nodal circuit element stamps, are developed to include these elements in the circuit matrix equation without the need of deriving equivalent circuit models consisting of interconnections of elements characterized only by currents and voltages, as in the current practice. The method is applied to derive circuit stamps of memristive, memcapacitive, meminductive, and other complex device models. The method reduces the size of the overall circuit matrix and allows easy model evaluation and linearization during the circuit iterative solution process. © 2011 IEEE.
dc.format.extent Pages: (89-100)
dc.language English
dc.publisher PISCATAWAY
dc.relation.ispartof Publication Name: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems; Publication Year: 2012; Volume: 31; no. 1; Pages: (89-100);
dc.source Scopus
dc.title Extended nodal analysis
dc.type Article
dc.contributor.affiliation Hajj, I.N., Department of Electrical and Computer Engineering, American University of Beirut, Beirut 1107 2020, Lebanon, Department of Electrical and Computer Engineering, University of Illinois at Urbana-Champaign, Urbana, IL 61801, United States
dc.contributor.authorAddress Hajj, I.N.; Department of Electrical and Computer Engineering, American University of Beirut, Beirut 1107 2020, Lebanon; email:
dc.contributor.authorCorporate University: American University of Beirut; Faculty: Faculty of Engineering and Architecture; Department: Electrical and Computer Engineering;
dc.contributor.authorDepartment Electrical and Computer Engineering
dc.contributor.faculty Faculty of Engineering and Architecture
dc.contributor.authorInitials Hajj, IN
dc.contributor.authorReprintAddress Hajj, IN (reprint author), Amer Univ Beirut, Dept Elect and Comp Engn, Beirut 11072020, Lebanon.
dc.contributor.authorUniversity American University of Beirut
dc.description.cited Biolek D, 2009, 2009 EUROPEAN CONFERENCE ON CIRCUIT THEORY AND DESIGN, VOLS 1 AND 2, P249, DOI 10.1109-ECCTD.2009.5274934; Biolek D, 2011, ANALOG INTEGR CIRC S, V66, P129, DOI 10.1007-s10470-010-9505-5; Biolek D, 2010, ELECTRON LETT, V46, P520, DOI 10.1049-el.2010.0358; Biolek D, 2010, ELECTRON LETT, V46, P1428, DOI 10.1049-el.2010.2309; Biolek D, 2010, PROCEEDINGS OF THE 2010 IEEE ASIA PACIFIC CONFERENCE ON CIRCUIT AND SYSTEM (APCCAS), P800, DOI 10.1109-APCCAS.2010.5774993; CHUA LO, 1971, IEEE T CIRCUITS SYST, VCT18, P507, DOI 10.1109-TCT.1971.1083337; CHUA LO, 1976, P IEEE, V64, P209, DOI 10.1109-PROC.1976.10092; Desoer Charies A., 1969, BASIC CIRCUIT THEORY; Di Ventra M, 2009, P IEEE, V97, P1717, DOI 10.1109-JPROC.2009.2021077; Gear CW, 1971, NUMERICAL INITIAL VA; HACHTEL GD, 1971, IEEE T CIRCUITS SYST, VCT18, P101, DOI 10.1109-TCT.1971.1083223; HAJJ I, 1985, COMPUTATIONAL METHOD; HO CW, 1975, IEEE T CIRCUITS SYST, VCA22, P504; Joglekar YN, 2009, EUR J PHYS, V30, P661, DOI 10.1088-0143-0807-30-4-001; Kavehei O, 2010, P ROY SOC A-MATH PHY, V466, P2175, DOI 10.1098-rspa.2009.0553; Lambert J.D., 1991, NUMERICAL METHODS OR; Najm F. N., 2010, CIRCUIT SIMULATION; Pillage L., 1995, ELECT CIRCUIT SYSTEM; Rak A, 2010, IEEE T COMPUT AID D, V29, P632, DOI 10.1109-TCAD.2010.2042900; Shin S, 2010, IEEE T COMPUT AID D, V29, P590, DOI 10.1109-TCAD.2010.2042891; Strukov DB, 2008, NATURE, V453, P80, DOI 10.1038-nature06932; VLACH J, 1994, METHODS CIRCUIT ANAL
dc.description.citedTotWOSCount 0
dc.description.citedWOSCount 0
dc.format.extentCount 12
dc.identifier.articleNo 6106732
dc.identifier.coden ITCSD
dc.identifier.scopusID 84255178370
dc.publisher.address 445 HOES LANE, PISCATAWAY, NJ 08855-4141 USA
dc.relation.ispartOfISOAbbr IEEE Trans. Comput-Aided Des. Integr. Circuits Syst.
dc.relation.ispartOfIssue 1
dc.relation.ispartofPubTitle IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
dc.relation.ispartofPubTitleAbbr IEEE Trans Comput Aided Des Integr Circuits Syst
dc.relation.ispartOfVolume 31
dc.source.ID WOS:000298327500009
dc.type.publication Journal
dc.subject.otherAuthKeyword Circuit element stamp
dc.subject.otherAuthKeyword extended nodal analysis
dc.subject.otherAuthKeyword mem-devices
dc.subject.otherAuthKeyword mem-systems
dc.subject.otherAuthKeyword modified nodal analysis
dc.subject.otherAuthKeyword nodal analysis
dc.subject.otherIndex Circuit elements
dc.subject.otherIndex mem-devices
dc.subject.otherIndex mem-systems
dc.subject.otherIndex Modified nodal analysis
dc.subject.otherIndex Nodal analysis
dc.subject.otherIndex Matrix algebra
dc.subject.otherIndex Electric network analysis
dc.subject.otherKeywordPlus NETWORK ANALYSIS
dc.subject.otherKeywordPlus MEMRISTOR
dc.subject.otherKeywordPlus MEMCAPACITOR
dc.subject.otherKeywordPlus ELEMENT
dc.subject.otherKeywordPlus SPICE
dc.subject.otherWOS Computer Science, Hardware and Architecture
dc.subject.otherWOS Computer Science, Interdisciplinary Applications
dc.subject.otherWOS Engineering, Electrical and Electronic

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