System level circuit performance modeling for microprocessors - by Fidaa Aref Farhat

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dc.contributor.authorFarhat, Fidaa Aref
dc.contributor.departmentAmerican University of Beirut. Faculty of Engineering and Architecture. Department of Electrical and Computer Engineering
dc.date1998
dc.date.accessioned2012-06-13T06:44:34Z
dc.date.available2012-06-13T06:44:34Z
dc.date.issued1998
dc.descriptionThesis (M.E.)--American University of Beirut. Department of Electrical and Computer Engineering, 1998;"Advisor: Dr. Ayman Kayssi, Associate Professor, Electrical and Computer Engineering--Member of Committee: Dr. Sami Karaki, Associate Professor, Electric
dc.descriptionBibliography : leaves 72-75
dc.description.abstractSince the beginning of the integrated circuit era, the number of devices per chip has increased by reducing the minimum feature size, enlarging the chip area, and improving the packing efficiency of the devices.--Interconnections play an important role in
dc.format.extentxii, 75 leaves : ill., tables
dc.identifier.urihttp://hdl.handle.net/10938/5477
dc.language.isoen
dc.relation.ispartofTheses, Dissertations, and Projects
dc.subject.classificationET:003934 AUBNO
dc.subject.lcshIntegrated circuits -- Computer simulation
dc.subject.lcshSimulation methods
dc.subject.lcshMicroprocessors
dc.titleSystem level circuit performance modeling for microprocessors - by Fidaa Aref Farhat
dc.typeThesis

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