Workload characterization :a loop-level perspective -
Abstract
Every processor manufacturing cycle includes a workload gathering step. At this step, a diverse set of workloads from processor targeted domains is collected to test various chip features. Though most collected workloads have different practical applications, yet they might be doing similar hardware work and thus wasting unnecessary resources and simulation time. To remove redundancy and decrease the workload set, a characterization tool, ELI-C was developed with reduction techniques that build on it to discover and remove workload similarity. Simulations showed the success of this tool, in that while decreasing the number of workloads to half the set size it maintained all the dynamic characteristics of the initial set. Taking advantage of the tool, a script was developed to join different workloads into a single executable while at the same time maintaining the tool-specific characterizations.
Description
Thesis (M.E.)-- American University of Beirut, Department of Electrical and Computer Engineeering, 2014.
Advisor : Dr. Mohammad M. Mansour, Associate Professor, Electrical and Computer Engineering ; Members of Committee : Dr. Wassim Masri, Associate Professor, Electrical and Computer Engineering ; Dr. Fadi Zaraket, Assistant Professor, Electrical and Computer Engineering.
Includes bibliographical references (leaves 60-62)
Advisor : Dr. Mohammad M. Mansour, Associate Professor, Electrical and Computer Engineering ; Members of Committee : Dr. Wassim Masri, Associate Professor, Electrical and Computer Engineering ; Dr. Fadi Zaraket, Assistant Professor, Electrical and Computer Engineering.
Includes bibliographical references (leaves 60-62)