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Hardware design and implementation of a crypto system -

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dc.contributor.author Awedikian, Serove Vartan,
dc.date.accessioned 2017-12-11T16:30:48Z
dc.date.available 2017-12-11T16:30:48Z
dc.date.issued 2017
dc.date.submitted 2017
dc.identifier.other b19183446
dc.identifier.uri http://hdl.handle.net/10938/20969
dc.description Thesis. M.E. American University of Beirut. Department of Electrical and Computer Engineering, 2017. ET:6591
dc.description Advisor : Dr. Mohammad Mansour, Professor, Electrical and Computer Engineering ; Members of Committee : Dr. Ayman Kayssi Professor, Electrical and Computer Engineering ; Dr. Ali Chehab, Associate Professor, Electrical and Computer Engineering.
dc.description Includes bibliographical references (leaves 51-54)
dc.description.abstract Elliptic Curve Cryptography (ECC) promises better security with less computational costs than other contemporary public cryptographic schemes. A cryptosystem based on ECC can find applications in a variety of computing and embedded systems such as RFID, and proximity cards. Public key cryptography has gained wide interest over the years as it overcomes the key management problem posed by private key cryptography. The most expensive operation in ECC is the point multiplication, and hence it is not surprising that most publications on the topic focus on this subject, overlooking the overall system. However, in ECC, a plain-text cannot be readily used for encryption, but has to be mapped to an elliptic point first, achieved by the Koblitz algorithm. In this paper, we propose a cryptosystem based on ECC over Koblitz curves, a special family of curves de- fined over binary extension fields that allow for efficient implementation of point multiplication. To do so, they require the integer to be in τNAF format. In this work, we propose a modified version of the Koblitz algorithm for text-to-point conversion that accelerates the process by 40percent. We introduce a novel design of the τNAF converter that runs over double the frequency of existing designs. We demonstrate a new technique in point multiplication that allows processing two digits at a time without any precomputation. We design a new component that performs both point addition and coordinate conversion efficiently, used after point multiplication. We implement all of the proposed architectures, and interconnect them together on a Xilinx Virtex-5 field programmable gate array (FPGA). The cryptosystem achieves a throughput over 27 Mbps on K-163.
dc.format.extent 1 online resource (x, 54 leaves) : illustrations
dc.language.iso eng
dc.relation.ispartof Theses, Dissertations, and Projects
dc.subject.classification ET:006591
dc.subject.lcsh Computer security.
dc.subject.lcsh Cryptography.
dc.subject.lcsh Computer hardware description languages.
dc.subject.lcsh VHDL (Computer hardware description language)
dc.subject.lcsh Curves, Elliptic.
dc.title Hardware design and implementation of a crypto system -
dc.type Thesis
dc.contributor.department Faculty of Engineering and Architecture.
dc.contributor.department Department of Electrical and Computer Engineering,
dc.contributor.institution American University of Beirut.


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