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System level circuit performance modeling for microprocessors - by Fidaa Aref Farhat
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| dc.contributor.author | Farhat, Fidaa Aref |
| dc.date.accessioned | 2012-06-13T06:44:34Z |
| dc.date.available | 2012-06-13T06:44:34Z |
| dc.date.issued | 1998 |
| dc.identifier.uri | http://hdl.handle.net/10938/5477 |
| dc.description | Thesis (M.E.)--American University of Beirut. Department of Electrical and Computer Engineering, 1998;"Advisor: Dr. Ayman Kayssi, Associate Professor, Electrical and Computer Engineering--Member of Committee: Dr. Sami Karaki, Associate Professor, Electric |
| dc.description | Bibliography : leaves 72-75 |
| dc.description.abstract | Since the beginning of the integrated circuit era, the number of devices per chip has increased by reducing the minimum feature size, enlarging the chip area, and improving the packing efficiency of the devices.--Interconnections play an important role in |
| dc.format.extent | xii, 75 leaves : ill., tables |
| dc.language.iso | eng |
| dc.relation.ispartof | Theses, Dissertations, and Projects |
| dc.subject.classification | ET:003934 AUBNO |
| dc.subject.lcsh | Integrated circuits -- Computer simulation |
| dc.subject.lcsh | Simulation methods |
| dc.subject.lcsh | Microprocessors |
| dc.title | System level circuit performance modeling for microprocessors - by Fidaa Aref Farhat |
| dc.type | Thesis |
| dc.contributor.department | American University of Beirut. Faculty of Engineering and Architecture. Department of Electrical and Computer Engineering |
