Browsing by Subject "Microprocessors."

Now showing items 1-9 of 9

Architecture performance simulator for the disjoint out-of-order execution processor (DOE) and the OpenDOE API -

Ejjeh, Adel Jihad (2015)

Traditional methods of increasing single-core CPU performance have been very effective until designers hit the “Power Wall”. In order to overcome this issue, designers switched to multi-core architectures. This architectural ...
Design and implementation of an X86 to ARM hardware binary translator

Najjar, Elias Abdallah. (2013)

Most processors nowadays implement old instruction set architectures. While the designs implement new architectures, they remain binary compatible with all previous versions of the ISA. Hardware manufacturers drive away ...
An evaluation of a hardware binary translation from X86 to ARM - by Hussein Ali Karaki.

Karaki, Hussein Ali. (2012)

In the computer hardware industry, there are currently two highly successful instruction set architectures (ISAs): the CISC X86 ISA which is an established standard architecture in the personal computer and server markets, ...
Leveraging strength-based dynamic information flow analysis to enhance control and data value predictions - by Walid Jawad Ghandour.

Ghandour, Walid Jawad. (2011)

Data dependence, also known as true dependence or read-after-write (RAW) hazard, occurs in programs when an instruction depends on the result of a previous instruction. Data dependences present a limiting factor on instruction ...
Low power stochastic SIMD hardware for error tolerant applications -

Abdallah, Sarah Anis, (2014)

Many emerging applications are error tolerant by nature: their operations are considered “correct” even if the underlying hardware is erroneous to a certain extent. Under these circumstances, fault-correction mechanisms ...
New out-of-order algorithms for future energy efficient cores

Sharafeddin, Mageda Assayed Abdallah. (2013)

With semiconductor advances following Moore's law by fitting twice as many transistors every two years on the same die size, designers continue to increase number of cores and cache size. Parallel applications can take ...
Tuning the continual flow pipeline architecture -

Jothi, Komal Madaiah, (2014)

One of the main factors that impacts performance of general purpose computer processors is misses to the data cache. Conventional techniques used in modern processors - building wide pipelines and large instruction buffers ...
A unified approach to maximizing run-time performance on power constrained adaptive processors using support vector regression -

Stockman, Melissa, (2014)

Processor resource needs vary across applications as well as within individual applications. Some programs may be memory intensive; others may have a high amount of branching, while others may need many floating point ...
Workload characterization :a loop-level perspective -

Shaccour, Elie M. (2014)

Every processor manufacturing cycle includes a workload gathering step. At this step, a diverse set of workloads from processor targeted domains is collected to test various chip features. Though most collected workloads ...

Now showing items 1-9 of 9

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Browsing by Subject "Microprocessors."

Browsing by Subject "Microprocessors."

Search AUB ScholarWorks

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All of AUB ScholarWorks

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Copyright Statement