Traditional methods of increasing single-core CPU performance have been very effective until designers hit the “Power Wall”. In order to overcome this issue, designers switched to multi-core architectures. This architectural ...
Most processors nowadays implement old instruction set architectures. While the designs implement new architectures, they remain binary compatible with all previous versions of the ISA. Hardware manufacturers drive away ...
With today’s advancing technology, massive amounts of data are being generated by users each day. Processing these data becomes a critical issue because it’s stored in geographically dispersed locations which add difficulties ...
In the computer hardware industry, there are currently two highly successful instruction set architectures (ISAs): the CISC X86 ISA which is an established standard architecture in the personal computer and server markets, ...
Image registration (IR) is a universal task which occurs in countless image analysis applications, including remote sensing, medicine, cartography and computer vision. This process is computationally intensive due to ...
Many emerging applications are error tolerant by nature: their operations are considered “correct” even if the underlying hardware is erroneous to a certain extent. Under these circumstances, fault-correction mechanisms ...
With semiconductor advances following Moore's law by fitting twice as many transistors every two years on the same die size, designers continue to increase number of cores and cache size. Parallel applications can take ...
In communications systems, increasing the data rate of transmission has become a vastly growing field of study. Multiple-Input Multiple-Output systems emerged as a promising approach in such a field. However, increasing ...
In this work, we present an implementation of a software and hardware computational platform for a Reconfigurable Active Solid State Drive (RASSD) node that was previously introduced in Abbani et al. 2011. This platform ...
Every processor manufacturing cycle includes a workload gathering step. At this step, a diverse set of workloads from processor targeted domains is collected to test various chip features. Though most collected workloads ...